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 BSO052N03S
OptiMOSTM2 Power-Transistor
Features * Fast switching MOSFET for SMPS * Optimized technology for notebook DC/DC converters * Qualified according to JEDEC1) for target applications * N-channel * Logic level * Excellent gate charge x R DS(on) product (FOM) * Very low on-resistance R DS(on) * Superior thermal resistance * Avalanche rated * Pb-free plating; RoHS compliant * Halogen-free according to IEC61249-2-21 Type BSO052N03S Package PG-DSO-8 Marking 052N3S
Product Summary V DS R DS(on),max ID PG-DSO-8 30 5.2 17 V m A
Maximum ratings, at T j=25 C, unless otherwise specified Parameter Symbol Conditions 10 secs Continuous drain current ID T A=25 C2) T A=70 C2) Pulsed drain current Avalanche energy, single pulse Reverse diode dv /dt Gate source voltage Power dissipation Operating and storage temperature IEC climatic category, DIN IEC 68-1 I D,pulse E AS dv /dt V GS P tot T j , T stg T A=25 C2) 2.5 T A=25 C3) I D=17 A, R GS=25 I D=17 A, V DS=20 V, di /dt =200 A/s, T j,max=150 C 17 14 68 380 6 20 1.56 -55 ... 150 55/150/56 mJ kV/s V W C Value steady state 14 11 A Unit
Rev. 2.0
page 1
2009-11-04
BSO052N03S
Parameter Symbol Conditions min. Thermal characteristics Thermal resistance, junction - soldering point Thermal resistance, junction - ambient R thJS minimal footprint, t p10 s minimal footprint, steady state 6 cm2 cooling area2), t p10 s 6 cm2 cooling area2), steady state Values typ. max. Unit
-
-
30
K/W
R thJA
-
-
110
-
-
150
-
-
50
-
-
80
Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D=1 mA V GS(th) I DSS V DS=V GS, I D=70 A V DS=30 V, V GS=0 V, T j=25 C V DS=30 V, V GS=0 V, T j=125 C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=4.5 V, I D=16 A V GS=10 V, I D=17 A Gate resistance Transconductance
1) 2)
30 1.2 -
1.6 0.1
2 1
V
A
-
10 10 5.4 4.3 1.2 63
100 100 6.7 5.2 S nA m
RG g fs |V DS|>2|I D|R DS(on)max, I D=17 A
32
J-STD20 and JESD22
2 Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air. 3)
see figure 3
Rev. 2.0
page 2
2009-11-04
BSO052N03S
Parameter Symbol Conditions min. Dynamic characteristics Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics 4) Gate to source charge Gate charge at threshold Gate to drain charge Switching charge Gate charge total Gate plateau voltage Gate charge total, sync. FET Output charge Reverse Diode Diode continous forward current Diode pulse current Diode forward voltage IS I S,pulse V SD T A=25 C V GS=0 V, I F=2.5 A, T j=25 C V R=15 V, I F=I S, di F/dt =400 A/s 0.72 2.5 68 1 A Q gs Q g(th) Q gd Q sw Qg V plateau Q g(sync) Q oss V DS=0.1 V, V GS=0 to 5 V V DD=15 V, V GS=0 V V DD=15 V, I D=8.5 A, V GS=0 to 5 V 11 6.6 7.5 12 32 2.7 28 35 15 8.8 11 17 43 37 47 V nC nC C iss C oss C rss t d(on) tr t d(off) tf V DD=15 V, V GS=10 V, I D=8.5 A, R G=2.7 V GS=0 V, V DS=15 V, f =1 MHz 4160 1480 190 9.7 7.4 40 6.2 5530 1970 280 15 11 60 9.3 ns pF Values typ. max. Unit
Reverse recovery charge
Qrr
-
-
15
4)
See figure 16 for gate charge parameter definition
Rev. 2.0
page 3
2009-11-04
BSO052N03S
1 Power dissipation P tot=f(T A); t p10 s 2 Drain current I D=f(T A); V GS10 V; t p10 s
3
20
2.5 15 2
P tot [W]
1.5
I D [A]
0 40 80 120 160
10
1 5 0.5
0
0 0 40 80 120 160
T A [C]
T A [C]
3 Safe operating area I D=f(V DS); T A=25 C1); D =0 parameter: t p
102
100
4 Max. transient thermal impedance Z thJS=f(t p) parameter: D =t p/T
102
33 s 100 s 0.5
100
10
1
10
limited by on-state resistance
1 ms
10
1
10
0.2 0.1
Z thJS [K/W]
0.05
I D [A]
10 ms
10
0
1
10
0
1
0.02
10 s
0.01
10-1
0.1
10-1
DC
0.1
single pulse
10-2
0.01 0.1 1 10 100
10-2
2
0.01 0.00001 0.0001 0.001 0.01 0.1 1 10
10
-1
10
0
V DS [V]
10
1
10
10-5
10-4
10-3
t p [s]
10-2
10-1
100
101
Rev. 2.0
page 4
2009-11-04
BSO052N03S
5 Typ. output characteristics I D=f(V DS); T j=25 C parameter: V GS
60
10 V 4.5 V
6 Typ. drain-source on resistance R DS(on)=f(I D); T j=25 C parameter: V GS
10
50
3.3 V
8
3.4 V
3.6 V
40
3.2 V 3.8 V
R DS(on) [m]
6
4V 4.2 V 4.5 V 5V 10 V
I D [A]
3.1 V
30
3V
4
20
2.8 V
10
2.6 V
2
0 0 1 2 3
0 0 10 20 30 40
V DS [V]
I D [A]
7 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j
60
8 Typ. forward transconductance g fs=f(I D); T j=25 C
100
50 80
40 60 30
g fs [S]
40 20
125 C 25 C
I D [A]
20
10
0 0 1 2 3 4
0 0 10 20 30
V GS [V]
I D [A]
Rev. 2.0
page 5
2009-11-04
BSO052N03S
9 Drain-source on-state resistance R DS(on)=f(T j); I D=17 A; V GS=10 V 10 Typ. gate threshold voltage V GS(th)=f(T j); V GS=V DS parameter: I D
10 9 8 7 2
700 A
2.5
R DS(on) [m]
6 5
V GS(th) [V]
98 %
1.5
70 A
typ
4 3 2 1 0 -60 -20 20 60 100 140 180
1
0.5
0 -60 -20 20 60 100 140 180
T j [C]
T j [C]
11 Typ. capacitances C =f(V DS); V GS=0 V; f =1 MHz
12 Forward characteristics of reverse diode I F=f(V SD) parameter: T j
104
10000
100
150 C
25 C Ciss 150 C, 98 % Coss
10
C [pF]
103
1000
I F [A]
1
25 C, 98% Crss
102
100
0.1 5 10 15 20 25 30 0.0 0.2 0.4 0.6 0.8 1.0 1.2
0
V DS [V]
V SD [V]
Rev. 2.0
page 6
2009-11-04
BSO052N03S
13 Avalanche characteristics I AS=f(t AV); R GS=25 parameter: T j(start)
100
14 Typ. gate charge V GS=f(Q gate); I D=8.5 A pulsed parameter: V DD
12
15 V
10
6V 25 C
24 V
8
10
100 C
V GS [V]
1000
I AV [A]
6
125 C
4
2
1 1 10 100
0 0 20 40 60 80
t AV [s]
Q gate [nC]
15 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=1 mA
16 Gate charge waveforms
36
V GS
34
Qg
32
30
V BR(DSS) [V]
28
26
V g s(th)
24
22
Q g(th) Q gs
-60 -20 20 60 100 140 180
Q sw Q gd
Q g ate
20
T j [C]
Rev. 2.0
page 7
2009-11-04
BSO052N03S
Package Outline PG-DSO-8
Rev. 2.0
page 8
2009-11-04
BSO052N03S
Published by Infineon Technologies AG 81726 Munich, Germany (c) 2009 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 2.0
page 9
2009-11-04


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